Publication_Yavuz

Yavuz, S. et al. (2025), Development of a pro-adaptive wrist-worn wearable device for Parkinson disease symptoms: Concept and initial approach

Publication, Publication_Yavuz, Publication_Grashof, Publication_Nitsche, Publication_Breil, Publication_Naroska

Title

Yavuz, S., Grashof, R., Nitsche, T., Breil, B., and Naroska, E. (2025). Development of a pro-adaptive wrist-worn wearable device for Parkinson disease symptoms: Concept and initial approach, Abstracts of the 2025 Joint Annual Conference of the Austrian (ÖGBMT), German (VDE DGBMT) and Swiss (SSBE) Societies for Biomedical Engineering Biomedical Engineering / Biomedizinische Technik, vol. 70, no. s1, 2025, pp. 1-374.

DOI: https://doi.org/10.1515/bmt-2025-1001

Yavuz, S., et al. (2024). Development of a 2-4 double arbiter PUF design on FPGA with enhanced performance.

Publication, Publication_Yavuz

Title

Yavuz, S. (2024). Development of a 2-4 double arbiter PUF design on FPGA with enhanced performance.

Abstract

Implementation of delay-based Physical Unclonable Functions (PUFs) on FPGAs poses significant challenges due to high requirements, such as the generation of unique and reliable keys. These requirements must be fulfilled, especially when using PUFs in security applications, otherwise security cannot be guaranteed. In addition, it must be ensured that physical disturbances such as fluctuations in the ambient temperature do not have a major impact on the performance of the PUF and therefore on security. In this paper, the implementation and evaluation of a novel 56-bit 2-4 Double Arbiter PUF (DAPUF) is presented. For performance analysis, the proposed 2-4 DAPUF is investigated with 20 Digilent Nexys-3 (AMD-Xilinx Spartan-6 FPGA) boards and a large data set of 30 million challenges under varying ambient temperature in the range from 0°C to 50°C. Our experimental results show that the proposed 2-4 DAPUF is resistant to temperature fluctuations. Here, the maximum change in reliability amounts to 1.18%. For randomness and uniqueness, the changes are less than 0.50%. Furthermore, our results show that performance can be significantly improved by combining PUFs with XOR operations.

Yavuz, S., et al. (2024). Vulnerabilities and challenges in the development of PUF-based authentication protocols on FPGAs: A brief review.

Publication, Publication_Yavuz, Publication_Naroska

Title

Yavuz, S., Daniel, K., & Naroska, E. (2024). Vulnerabilities and challenges in the development of PUF-based authentication protocols on FPGAs: A brief review.

Abstract

The security of IoT (Internet of Things) devices and the protection of sensitive information processed by these devices such as personal data, sensor values, process-related information is an important and difficult challenge. A major task in IoT communication is secure identification of devices. Unfortunately, traditional cryptographic methods are often not suitable for IoT devices due to their limited hardware resources. However, typical methods are computationally intensive, require a large amount of memory, and have a high-power consumption. On the other hand, Physical Unclonable Functions (PUFs) are low-cost and lightweight hardware-based primitives that can be used as a security component to protect data against third parties and thus increase security of a device. In this paper, the challenges and vulnerabilities in the development of PUF-based authentication protocols are presented. To this end, a security analysis of different approaches known from literature are discussed. Furthermore, possible attack vectors and prevention techniques are also considered.