Publication_Yavuz

Title Yavuz, S. (2024). Development of a 2-4 double arbiter PUF design on FPGA with enhanced performance. Abstract Implementation of delay-based Physical Unclonable Functions (PUFs) on FPGAs poses significant challenges due to high requirements, such as the generation of unique and reliable keys. These requirements must be fulfilled, especially when using PUFs in security applications, otherwise security cannot be guaranteed. In addition, it must be ensured that physical disturbances such as fluctuations in the ambient temperature do not have a major impact on the performance of the PUF and therefore on security.

Title Yavuz, S., Daniel, K., & Naroska, E. (2024). Vulnerabilities and challenges in the development of PUF-based authentication protocols on FPGAs: A brief review. Abstract The security of IoT (Internet of Things) devices and the protection of sensitive information processed by these devices such as personal data, sensor values, process-related information is an important and difficult challenge. A major task in IoT communication is secure identification of devices. Unfortunately, traditional cryptographic methods are often not suitable for IoT devices due to their limited hardware resources.